8( /nvidia,cardhu-a04nvidia,cardhunvidia,tegra30 +;7NVIDIA Tegra30 Cardhu A04 (A05, A06, A07) evaluation boardemc-dvfs-opp-tableoperating-points-v2=opp@12750000,950 E~~pSŒZopp@12750000,1000 EB@B@pSŒZopp@12750000,1250 EpSŒZopp@25500000,950 E~~pS`Zopp@25500000,1000 EB@B@pS`Zopp@25500000,1250 EpS`Zopp@27000000,950 E~~pSZopp@27000000,1000 EB@B@pSZopp@27000000,1250 EpSZopp@51000000,950 E~~pS 2Zopp@51000000,1000 EB@B@pS 2Zopp@51000000,1250 EpS 2Zopp@54000000,950 E~~pS7Zopp@54000000,1000 EB@B@pS7Zopp@54000000,1250 EpS7Zopp@102000000,950 E~~pSeZopp@102000000,1000 EB@B@pSeZopp@102000000,1250 EpSeZopp@108000000,1000 EB@B@pSoZopp@108000000,1250 EpSoZopp@204000000,1000 EB@B@pS (Zkopp@204000000,1250 EpS (Zkopp@333500000,1000 EB@B@pS`Zopp@333500000,1200 EOOpS`Zopp@333500000,1250 EpS`Zopp@375000000,1000 EB@B@pSZ Zopp@375000000,1200 EOOpSZ Zopp@375000000,1250 EpSZ Zopp@400000000,1000 EB@B@pSׄZopp@400000000,1200 EOOpSׄZopp@400000000,1250 EpSׄZopp@416000000,1200 EOOpS˨Zopp@416000000,1250 EpS˨Zopp@450000000,1200 EOOpStZopp@450000000,1250 EpStZopp@533000000,1200 EOOpS@Zopp@533000000,1250 EpS@Zopp@625000000,1200 EOOpS%@@Zopp@625000000,1250 EpS%@@Zopp@667000000,1200 EOOpS'Zopp@750000000,1300 E  pS,Zopp@800000000,1300 E  pS/Zopp@900000000,1350 EpppS5Zemc-bandwidth-opp-tableoperating-points-v2= opp@12750000SŒZwpopp@25500000S`Zwopp@27000000SZwKopp@51000000S 2Zw9opp@54000000S7Zwopp@102000000SeZw sopp@108000000SoZw /opp@204000000S (Zwkopp@333500000S`Zw(opp@375000000SZ Zw-opp@400000000SׄZw0opp@416000000S˨Zw2opp@450000000StZw6opp@533000000S@ZwA@opp@625000000S%@@ZwLK@opp@667000000S'ZwQkopp@750000000S,Zw[opp@800000000S/Zwaopp@900000000S5Zwmmemory@80000000memory@pcie@3000nvidia,tegra30-pciepci08 padsaficsbc intrmsi b+@@ B(( FHpexafipll_ecmlFHJpexafipcie_x#okay*+;O_tpci@1,0pci #disabled+pci@2,0pci #disabled+pci@3,0pci@#okay+sram@40000000 mmio-sram@+ @sram@400= host1x@50000000nvidia,tegra30-host1xP@ACsyncpthost1xhost1xhost1x + TTmpe@54040000nvidia,tegra30-mpeT D<<mpevi@54080000nvidia,tegra30-viT Eviepp@540c0000nvidia,tegra30-eppT  Feppisp@54100000nvidia,tegra30-ispT Gispgr2d@54140000nvidia,tegra30-gr2dT H2dgr3d@54180000nvidia,tegra30-gr3dTb3d3d2b3d3d2  dc@54200000nvidia,tegra30-dcT  I dcparentdc<     #winawinbwinb-vfilterwinccursorrgb#okay dc@54240000nvidia,tegra30-dcT$ J dcparentdc<     #winawinbwinb-vfilterwinccursorrgb #disabledhdmi@54280000nvidia,tegra30-hdmiT( K3 hdmiparent3hdmi #disabledtvo@542c0000nvidia,tegra30-tvoT, L #disableddsi@54300000nvidia,tegra30-dsiT00 dsiparent0dsi #disableddsi@54400000nvidia,tegra30-dsiT@R dsiparentTdsi #disabledtimer@50040600arm,cortex-a9-twd-timerP    interrupt-controller@50041000arm,cortex-a9-gicPP =cache-controller@50043000arm,pl310-cacheP0  %3interrupt-controller@60004000nvidia,tegra30-ictlr(`@`AP`BP`CP`DP =timer@60005000*nvidia,tegra30-timernvidia,tegra20-timer`PH)*yzclock@60006000nvidia,tegra30-car``?L=flow-controller@60007000nvidia,tegra30-flowctrl`pdma@6000a000,nvidia,tegra30-apbdmanvidia,tegra20-apbdma`hijklmnopqrstuvw""dmaY=ahb@6000c000nvidia,tegra30-ahb`Pactmon@6000c800nvidia,tegra30-actmon` -w9 actmonemcwactmond  '  cpu-readx=#gpio@6000d000nvidia,tegra30-gpio`` !"#7WY}=vde@6001a000&nvidia,tegra30-vdenvidia,tegra20-vdeH`````````*sxebsevmbeppemcetfeppbvdmaframeid $   sync-tokenbsevsxe=vdemc=apbmisc@70000800.nvidia,tegra30-apbmiscnvidia,tegra20-apbmiscpdppinmux@70000868nvidia,tegra30-pinmuxphp0default pinmux= sdmmc1_clk_pz0sdmmc1_clk_pz0sdmmc1sdmmc1_cmd_pz1Osdmmc1_cmd_pz1sdmmc1_dat0_py7sdmmc1_dat1_py6sdmmc1_dat2_py5sdmmc1_dat3_py4sdmmc1sdmmc3_clk_pa6sdmmc3_clk_pa6sdmmc3sdmmc3_cmd_pa7Osdmmc3_cmd_pa7sdmmc3_dat0_pb7sdmmc3_dat1_pb6sdmmc3_dat2_pb5sdmmc3_dat3_pb4sdmmc3sdmmc4_clk_pcc4"sdmmc4_clk_pcc4sdmmc4_rst_n_pcc3sdmmc4sdmmc4_dat0_paa0sdmmc4_dat0_paa0sdmmc4_dat1_paa1sdmmc4_dat2_paa2sdmmc4_dat3_paa3sdmmc4_dat4_paa4sdmmc4_dat5_paa5sdmmc4_dat6_paa6sdmmc4_dat7_paa7sdmmc4dap2_fs_pa25dap2_fs_pa2dap2_sclk_pa3dap2_din_pa4dap2_dout_pa5i2s1sdio3 drive_sdio3.8*Phuart3_txd_pw6<uart3_txd_pw6uart3_cts_n_pa1uart3_rts_n_pc0uart3_rxd_pw7uartcserial@70006000(nvidia,tegra30-uartnvidia,tegra20-uartp`@ $serialrxtx#okayserial@70006040(nvidia,tegra30-uartnvidia,tegra20-uartp`@@ %serial  rxtx #disabledserial@70006200nvidia,tegra30-hsuartpb .77serial  rxtx#okayserial@70006300(nvidia,tegra30-uartnvidia,tegra20-uartpc ZAAserialrxtx #disabledserial@70006400(nvidia,tegra30-uartnvidia,tegra20-uartpd [BBserialrxtx #disabledgmi@70009000nvidia,tegra30-gmip+H*gmi*gmi #disabledpwm@7000a000&nvidia,tegra30-pwmnvidia,tegra20-pwmppwm#okay='rtc@7000e000&nvidia,tegra30-rtcnvidia,tegra20-rtcp i2c@7000c000&nvidia,tegra30-i2cnvidia,tegra20-i2cp &+ div-clkfast-clk i2crxtx#okay=(i2c@7000c400&nvidia,tegra30-i2cnvidia,tegra20-i2cp T+6div-clkfast-clk6i2crxtx#okayi2c@7000c500&nvidia,tegra30-i2cnvidia,tegra20-i2cp \+Cdiv-clkfast-clkCi2crxtx#okayisl29028@44isil,isl29028D Xi2cmux@70 nxp,pca9546+p i2c@7000c700&nvidia,tegra30-i2cnvidia,tegra20-i2cp x+ggi2cdiv-clkfast-clkrxtx#okayi2c@7000d000&nvidia,tegra30-i2cnvidia,tegra20-i2cp 5+/div-clkfast-clk/i2crxtx#okaywm8903@1a wlf,wm8903 d=-tps65911@2d ti,tps65911- V ".:FR^=+regulatorsvdd1kvddio_ddr_1v2zOOvdd2 kvdd_1v5_genz``=vddctrlkvdd_cpu,vdd_sysz 5=vio kvdd_1v8_genzw@w@=ldo1kvdd_pexa,vdd_pexbz=ldo2kvdd_sata,avdd_pllez=ldo4kvdd_rtczOOldo5kvddio_sdmmc,avdd_vdacz2Z2Zldo6kavdd_dsi_csi,pwrdet_mipizOOldo7kvdd_pllm,x,u,a_p_c_szOOldo8 kvdd_ddr_hszB@B@temperature-sensor@4c onnn,nct1008L* 5=$tps62361@60 ti,tps62361`ktps62361-voutz `K]q=spi@7000d400*nvidia,tegra30-slinknvidia,tegra20-slinkp ;+))spirxtx #disabledspi@7000d600*nvidia,tegra30-slinknvidia,tegra20-slinkp R+,,spirxtx #disabledspi@7000d800*nvidia,tegra30-slinknvidia,tegra20-slinkp S+..spirxtx #disabledspi@7000da00*nvidia,tegra30-slinknvidia,tegra20-slinkp ]+DDspirxtx#okay}x@spi-flash@1winbond,w25q32jedec,spi-nor1-spi@7000dc00*nvidia,tegra30-slinknvidia,tegra20-slinkp ^+hhspirxtx #disabledspi@7000de00*nvidia,tegra30-slinknvidia,tegra20-slinkp O+ijspirxtx #disabledkbc@7000e200&nvidia,tegra30-kbcnvidia,tegra20-kbcp U$$kbc #disabledpmc@7000e400nvidia,tegra30-pmcp pclkclk32k_in?#okay*Ce=.memory-controller@7000f000nvidia,tegra30-mcp mc ML=memory-controller@7000f400nvidia,tegra30-emcp N9d= fuse@7000f800nvidia,tegra30-efusepfuse'fusetsensor@70014000nvidia,tegra30-tsensorp@ fddd 5=!hda@70030000nvidia,tegra30-hdap Q}ohdahda2hdmihda2codec_2x}ohdahda2hdmihda2codec_2x #disabledahub@70080000nvidia,tegra30-ahubpp gjkd_audioapbifXjk eflmn <d_audioapbifi2s0i2s1i2s2i2s3i2s4dam0dam1dam2spdif@ rx0tx0rx1tx1rx2tx2rx3tx3+i2s@70080300nvidia,tegra30-i2spi2s #disabledi2s@70080400nvidia,tegra30-i2sp  i2s#okay=,i2s@70080500nvidia,tegra30-i2spi2s #disabledi2s@70080600nvidia,tegra30-i2speei2s #disabledi2s@70080700nvidia,tegra30-i2spffi2s #disabledmmc@78000000nvidia,tegra30-sdhcix sdhcisdhci#okay E  ".mmc@78000200nvidia,tegra30-sdhcix  sdhci sdhci #disabledmmc@78000400nvidia,tegra30-sdhcix EsdhciEsdhci#okay ".8mmc@78000600nvidia,tegra30-sdhcix sdhcisdhci#okay.Nusb@7d000000nvidia,tegra30-ehciusb-ehci}@ \utmiusbe #disabledusb-phy@7d000000nvidia,tegra30-usb-phy}@}@\utmiregpll_uutmi-padsusbutmi-pads 33G Zq #disabled=usb@7d004000nvidia,tegra30-ehciusb-ehci}@@ \utmi::usb #disabledusb-phy@7d004000nvidia,tegra30-usb-phy}@@}@\utmi:regpll_uutmi-pads:usbutmi-pads 33G Zq #disabled=usb@7d008000nvidia,tegra30-ehciusb-ehci}@ a\utmi;;usb#okayusb-phy@7d008000nvidia,tegra30-usb-phy}@}@\utmi;regpll_uutmi-pads;usbutmi-pads33G Zq#okay=cpus+cpu@0cpuarm,cortex-a9xd=cpu@1cpuarm,cortex-a9xd=cpu@2cpuarm,cortex-a9xd=cpu@3cpuarm,cortex-a9xd= pmuarm,cortex-a9-pmu0 thermal-zonestsensor0-thermal!tripsdvfs-alert 8 passive="cpu-div2-throttle L hotsoc-critical _  criticalcooling-mapsmap0 "<  #tsensor1-thermal #disabled!tripsdvfs-alert 8 passivecpu-thermal$tripscpu-alert0 ި passive=%cpu-crit `  criticalcooling-mapsmap0 %0  cpu_opp_table0operating-points-v2 .=opp@51000000,800 9Z1S 2 E 5 5opp@51000000,850 9Z S 2 E P Popp@51000000,912 9ZS 2 E opp@102000000,800 9Z1Se E 5 5opp@102000000,850 9Z Se E P Popp@102000000,912 9ZSe E opp@204000000,800 9Z1S (k E 5 5opp@204000000,850 9Z S (k E P Popp@204000000,912 9ZS (k E opp@312000000,850 9Z S E P Popp@312000000,912 9ZS E opp@340000000,800 9ZSC E 5 5opp@340000000,850 9ZSC E P Popp@370000000,800 9Z0lS  E 5 5opp@456000000,850 9Z S. E P Popp@456000000,912 9ZS. E opp@475000000,800 9Z1SO E 5 5opp@475000000,850 9(ZSO E P Popp@608000000,850 9ZS$=X E P Popp@608000000,912 9ZS$=X E opp@620000000,850 9Z0lS$s E P Popp@640000000,850 9xZS&% E P Popp@640000000,900 9ZS&% E opp@760000000,850 9PZ4aS-L E P Popp@760000000,900 9hZS-L E opp@760000000,912 9ZS-L E opp@760000000,975 9ZS-L Eopp@816000000,850 9ZS0, E P Popp@816000000,912 9ZS0, E opp@860000000,850 9Z S3B E P Popp@860000000,900 9xZS3B E opp@860000000,975 98ZS3B Eopp@860000000,1000 9ZS3B EB@B@opp@910000000,900 9Z0`S6= E opp@1000000000,900 9Z S; E opp@1000000000,975 9xZS; Eopp@1000000000,1000 9ZS; EB@B@opp@1000000000,1025 9ZS; Eopp@1100000000,900 9ZSA E opp@1100000000,975 9HZSA Eopp@1100000000,1000 98ZSA EB@B@opp@1100000000,1025 9ZSA Eopp@1100000000,1075 9ZSA Eg8g8opp@1150000000,975 9Z0`SD Eopp@1200000000,975 9ZSG Eopp@1200000000,1000 9HZSG EB@B@opp@1200000000,1025 98ZSG Eopp@1200000000,1050 9ZSG Eopp@1200000000,1075 9ZSG Eg8g8opp@1200000000,1100 9ZSG Eopp@1300000000,1000 9ZSM|m EB@B@opp@1300000000,1025 9 ZSM|m Eopp@1300000000,1050 9XZ0a @ SM|m Eopp@1300000000,1075 9 ZSM|m Eg8g8opp@1300000000,1100 9ZSM|m Eopp@1300000000,1125 9ZSM|m E**opp@1300000000,1150 9ZSM|m E00opp@1300000000,1175 9ZSM|m Eopp@1400000000,1100 9Z0|SSrN Eopp@1400000000,1125 9Z SSrN E**opp@1400000000,1150 9Z SSrN E00opp@1400000000,1175 9ZSSrN Eopp@1400000000,1237 9ZSSrN Eopp@1500000000,1125 9(Z @ SYh/ E**opp@1500000000,1150 9(Z @ SYh/ E00opp@1500000000,1200 9ZSYh/ EOOopp@1500000000,1237 9ZSYh/ Eopp@1600000000,1212 9Z0`S_^ E~`~`opp@1600000000,1237 9Z0`S_^ Eopp@1700000000,1212 9Z0`SeS E~`~`opp@1700000000,1237 9Z0`SeS Ealiases J/i2c@7000d000/tps65911@2d O/rtc@7000e000 T/serial@70006000 \/serial@70006200chosen dserial0:115200n8backlightpwm-backlight p: }& 'LK@  @ =*clock@0 fixed-clock?=panelchunghwa,claa101wb01 ( }) pZ *= regulator@0regulator-fixed kvdd_ac_batzLK@LK@=regulator@1regulator-fixedkcam_1v8zw@w@   regulator@2regulator-fixedkcp_5vzLK@LK@K  +regulator@3regulator-fixed kemmc_3v3z2Z2ZK   regulator@4regulator-fixed kmodem_3v3z2Z2Z  regulator@5regulator-fixed kpex_hvdd_3v3z2Z2Z  _ =regulator@6regulator-fixed kvdd_cam1_ldoz**   regulator@7regulator-fixed kvdd_cam2_ldoz**   regulator@8regulator-fixed kvdd_cam3_ldoz2Z2Z   regulator@9regulator-fixedkvdd_comz2Z2ZK   regulator@10regulator-fixed kvdd_fuse_3v3z2Z2Z  ^ regulator@11regulator-fixed kvdd_pnl1z2Z2ZK  \ =)regulator@12regulator-fixed kvddio_vidzLK@LK@    sound;nvidia,tegra-audio-wm8903-cardhunvidia,tegra-audio-wm8903 NVIDIA Tegra Cardhu{ Headphone JackHPOUTRHeadphone JackHPOUTLInt SpkROPInt SpkRONInt SpkLOPInt SpkLONMic JackMICBIASIN1LMic Jack , 6- I- ^.pll_apll_a_out0mclkx.xgpio-keys gpio-keyspower rPower + xt dvolume-down rVolume Down  xr volume-up rVolume Up  xs regulator@100regulator-fixedkddrz``K  +regulator@101regulator-fixedksys_3v3z2Z2ZK  +=regulator@102regulator-fixed kusb1_vbuszLK@LK@    regulator@103regulator-fixed kusb3_vbuszLK@LK@    =regulator@104regulator-fixedk5v0zLK@LK@  +=regulator@105regulator-fixedkvdd_blzLK@LK@K  =&regulator@106regulator-fixedkvdd_bl2zLK@LK@K   compatibleinterrupt-parent#address-cells#size-cellsmodelphandleopp-microvoltopp-hzopp-supported-hwopp-suspendopp-peak-kBpsdevice_typeregreg-namesinterruptsinterrupt-names#interrupt-cellsinterrupt-map-maskinterrupt-mapbus-rangerangesclocksclock-namesresetsreset-namesstatusavdd-pexb-supplyavdd-pex-pll-supplyhvdd-pex-supplyvddio-pex-ctl-supplyavdd-plle-supplyassigned-addressesnvidia,num-lanespooliommusnvidia,headinterconnectsinterconnect-namesnvidia,panelinterrupt-controllerarm,data-latencyarm,tag-latencycache-unifiedcache-level#clock-cells#reset-cells#dma-cellsoperating-points-v2#cooling-cells#gpio-cellsgpio-controllerirampinctrl-namespinctrl-0nvidia,pinsnvidia,functionnvidia,pullnvidia,tristatenvidia,high-speed-modenvidia,schmittnvidia,pull-down-strengthnvidia,pull-up-strengthnvidia,slew-rate-risingnvidia,slew-rate-fallingreg-shiftdmasdma-names#pwm-cellsclock-frequencyreset-gpiomicdet-cfgmicdet-delaygpio-cfgwakeup-sourceti,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-coupled-withregulator-coupled-max-spreadregulator-max-step-microvoltnvidia,tegra-cpu-regulatorvcc-supply#thermal-sensor-cellsregulator-boot-onti,vsel0-state-highti,vsel1-state-highnvidia,tegra-core-regulatorspi-max-frequencynvidia,invert-interruptnvidia,suspend-modenvidia,cpu-pwr-good-timenvidia,cpu-pwr-off-timenvidia,core-pwr-good-timenvidia,core-pwr-off-timenvidia,core-power-req-active-highnvidia,sys-clock-req-active-high#iommu-cells#interconnect-cellsnvidia,memory-controllerassigned-clocksassigned-clock-parentsassigned-clock-ratesnvidia,ahub-cif-idscd-gpioswp-gpiospower-gpiosbus-widthkeep-power-in-suspendnon-removablephy_typenvidia,needs-double-resetnvidia,phy#phy-cellsnvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-setup-use-fusesnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,xcvr-hsslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,has-utmi-pad-registersvbus-supplycpu-supplyinterrupt-affinitypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceopp-sharedclock-latency-nsrtc0rtc1serial0serial1stdout-pathenable-gpiospower-supplypwmsbrightness-levelsdefault-brightness-levelddc-i2c-busbacklightenable-active-highvin-supplygpio-open-drainnvidia,modelnvidia,audio-routingnvidia,i2s-controllernvidia,audio-codecnvidia,spkr-en-gpiosnvidia,hp-det-gpioslabellinux,codedebounce-interval