kt8e(eL(,chipspark,rayeager-px2rockchip,rk3066a 7Rayeager PX2aliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/serial@10124000h/serial@10126000p/serial@20064000x/serial@20068000/spi@20070000/spi@20074000/mmc@10214000/mmc@10218000/mmc@1021c000oscillator ,fixed-clockn6xin24mgpu@10090000",rockchip,rk3066-maliarm,mali-400  buscorex  disabledx5gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3.video-codec@10104000,rockchip,rk3066-vpu@   vepuvdpu (aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu.cache-controller@10138000,arm,pl310-cache<JVHscu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer   local-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gic^sVserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uart@ "baudclkapb_pclk@L okaytxrxdefault serial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uart` #baudclkapb_pclkAM  disabledtxrxdefaultqos@1012d000,rockchip,rk3066-qossyscon V)qos@1012e000,rockchip,rk3066-qossyscon V(qos@1012f000,rockchip,rk3066-qossyscon V"qos@1012f080,rockchip,rk3066-qossyscon V$qos@1012f100,rockchip,rk3066-qossyscon V&qos@1012f180,rockchip,rk3066-qossyscon V#qos@1012f200,rockchip,rk3066-qossyscon V%qos@1012f280,rockchip,rk3066-qossyscon V'usb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg@@   usb2-phy okayusb@101c0000 ,snps,dwc2 otghost  usb2-phy okaydefault ethernet@10204000,rockchip,rk3066-emac @<  D hclkmacrefd rmii okaydefault )-ethernet-phy@0 8Vmmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciurx-txDQOreset okay[defaultis~mmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciurx-txDROreset okaydefault i~mmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciurx-txDSOreset okayidefault  ~!!nand-controller@10500000,rockchip,rk2928-nfcP@ ahb  disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @reboot-mode,syscon-reboot-mode@RBRBRB RBpower-controller!,rockchip,rk3066-power-controllerVpower-domain@7PO"#$%&'power-domain@6 (power-domain@8)grf@20008000&,rockchip,rk3066-grfsysconsimple-mfd V usbphy1,rockchip,rk3066a-usb-phyrockchip,rk3288-usb-phy okayusb-phy@17c|Qphyclk V usb-phy@188Rphyclk V dma-controller@20018000,arm,pl330arm,primecell @+6Q apb_pclkVdma-controller@2001c000,arm,pl330arm,primecell @+6Q apb_pclk  disabledi2c@2002d000,rockchip,rk3066-i2c  ( i2cP okaydefault*ak8963@d,asahi-kasei,ak8975 +default,mma8452@1d ,fsl,mma8452+default-i2c@2002f000,rockchip,rk3066-i2c  ) Qi2c okaydefault.tps@2d-/default01h2t2223322 ,ti,tps65910regulatorsregulator@0vcc_rtcvrtcregulator@1vcc_io2Z2ZvioV3regulator@2vdd_arm '`1vdd1VIregulator@3vcc_ddr '`1vdd2regulator@5vcc18w@w@vdig1regulator@6vdd_11vdig2regulator@7vcc_25&%&%vpllV?regulator@8 vccio_wlw@w@vdacVregulator@9 vcc25_hdmi&%&% vaux1regulator@10vcca_332Z2Z vaux2regulator@11 vcc_rmii2Z2Z vaux33Vregulator@12 vcc28_cif** vmmcregulator@4vdd3regulator@13 vbbpwm@20030000,rockchip,rk2928-pwm CF  disableddefault4pwm@20030010,rockchip,rk2928-pwm CF okaydefault5watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt K 3 okaypwm@20050020,rockchip,rk2928-pwm  CG okaydefault6pwm@20050030,rockchip,rk2928-pwm 0CG okaydefault7VZi2c@20056000,rockchip,rk3066-i2c ` * Ri2c okaydefault8i2c@2005a000,rockchip,rk3066-i2c  + Si2c okaydefault9i2c@2005e000,rockchip,rk3066-i2c  4 Ti2c okaydefault:serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uart @ $baudclkapb_pclkBN okaytxrxdefault;serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uart  %baudclkapb_pclkCO okay txrxdefault <=>saradc@2006c000,rockchip,saradc  NGJsaradcapb_pclkW Osaradc-apb okay`?spi@20070000,rockchip,rk3066-spiEHspiclkapb_pclk &   txrx okaydefault@ABCspi@20074000,rockchip,rk3066-spiFIspiclkapb_pclk ' @  txrx  disableddefaultDEFGdma-controller@20078000,arm,pl330arm,primecell @+6Q apb_pclkVcpuslrockchip,rk3066-smpcpu@0zcpu,arm,cortex-a9H8@ Oa* s* 'g8@Icpu@1zcpu,arm,cortex-a9HIdisplay-subsystem,rockchip,display-subsystemJKsram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3066-vop  aclk_vopdclk_vophclk_vop.def Oaxiahbdclk  disabledportVJendpoint@0LVPvop@1010e000,rockchip,rk3066-vop aclk_vopdclk_vophclk_vop.ghi Oaxiahbdclk  disabledportVKendpoint@0MVQhdmi@10116000,rockchip,rk3066-hdmi`  @hclkdefaultNO.   disabledportsport@0endpoint@0PVLendpoint@1QVMport@1i2s@10118000,rockchip,rk3066-i2s  defaultRKi2s_clki2s_hclktxrx  disabledi2s@1011a000,rockchip,rk3066-i2s   defaultSLi2s_clki2s_hclktxrx  disabledi2s@1011c000,rockchip,rk3066-i2s  defaultTMi2s_clki2s_hclk  txrx  disabledclock-controller@20000000,rockchip,rk3066a-cru  $@^_ ׄ#gрxhрxhVtimer@2000e000,snps,dw-apb-timer  .VD timerpclkefuse@20010000,rockchip,rk3066a-efuse @[ pclk_efusecpu_leakage@17timer@20038000,snps,dw-apb-timer  ,TB timerpclktimer@2003a000,snps,dw-apb-timer  -UC timerpclktsadc@20060000,rockchip,rk3066-tsadc ]]saradcapb_pclk N\ Osaradc-apb  disabledpinctrl,rockchip,rk3066a-pinctrl gpio0@20034000,rockchip,gpio-bank @ 6U1A^sV_gpio1@2003c000,rockchip,gpio-bank  7V1A^sVgpio2@2003e000,rockchip,gpio-bank  8W1A^sgpio3@20080000,rockchip,gpio-bank  9X1A^sV]gpio4@20084000,rockchip,gpio-bank @ :Y1A^sV+gpio6@2000a000,rockchip,gpio-bank  <Z1A^sV/pcfg-pull-defaultMVWpcfg-pull-nonecVUemacemac-xferpUUUUUUUUVemac-mdio pUUVrmii-rstpVVemmcemmc-clkpWVemmc-cmdp WVemmc-rstp WV hdmihdmi-hpdpWVOhdmii2c-xfer pUUVNi2c0i2c0-xfer pUUV*i2c1i2c1-xfer pUUV.i2c2i2c2-xfer pUUV8i2c3i2c3-xfer pUUV9i2c4i2c4-xfer pUUV:pwm0pwm0-outpUV4pwm1pwm1-outpUV5pwm2pwm2-outpUV6pwm3pwm3-outpUV7spi0spi0-clkpWV@spi0-cs0pWVCspi0-txpWVAspi0-rxpWVBspi0-cs1pWspi1spi1-clkpWVDspi1-cs0pWVGspi1-rxpWVFspi1-txpWVEspi1-cs1pWuart0uart0-xfer pWWVuart0-ctspWVuart0-rtspWVuart1uart1-xfer pWWVuart1-ctspWuart1-rtspWuart2uart2-xfer pW WV;uart3uart3-xfer pWWV<uart3-ctspWV=uart3-rtspWV>sd0sd0-clkpWVsd0-cmdp WVsd0-cdpWVsd0-wppWsd0-bus-width1p Wsd0-bus-width4@p W W W WVsd1sd1-clkpWVsd1-cmdpWVsd1-cdpWsd1-wppWsd1-bus-width1pWsd1-bus-width4@pWWWWVi2s0i2s0-buspWW W W W W WWWVRi2s1i2s1-bus`pWWWWWWVSi2s2i2s2-bus`pWWWWWWVTpcfg-output-high~VVak8963comp-intpWV,irir-intpWVXkeyspwr-keypWVYmma8452gsensor-intpWV-mmcsdmmc-pwrpWV^usb_hosthost-drvpWV`hub-rstpVV sata-pwrpWV[sata-resetp VV usb_otgotg-drvpWVatpspmic-intpWV0pwr-holdpVV1memory@60000000zmemory`@ir-receiver,gpio-ir-receiver >/defaultXgpio-keys ,gpio-keyspower >/ GPIO PowertdefaultYvdd-log,pwm-regulator Zvdd_logOOB@dO* okayvsys-regulator,regulator-fixedvsysLK@LK@1V2stdby-regulator,regulator-fixed 5v_stdbyLK@LK@1V\emmc-regulator,regulator-fixed emmc_vccq--2V!sata-regulator,regulator-fixed +default[usb_5vLK@LK@\sdmmc-regulator,regulator-fixed ]default^vcc_sd2Z2Z3Vusb-host-regulator,regulator-fixed _default` host-pwrLK@LK@\usb-otg-regulator,regulator-fixed _defaultavcc_otgLK@LK@\ #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1mmc0mmc1mmc2clock-frequency#clock-cellsclock-output-namesregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelphandleinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modephyphy-supplyreset-gpiosfifo-depthreset-namesmax-frequencybus-widthdisable-wpvmmc-supplycap-mmc-highspeedcap-sd-highspeednon-removablevqmmc-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsvref-supplyenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportsrangesremote-endpointrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsoutput-highwakeup-sourcelabellinux,codepwmsvoltage-tablevin-supplyenable-active-highgpiostartup-delay-us