8( google,veyron-mickey-rev8google,veyron-mickey-rev7google,veyron-mickey-rev6google,veyron-mickey-rev5google,veyron-mickey-rev4google,veyron-mickey-rev3google,veyron-mickey-rev2google,veyron-mickey-rev1google,veyron-mickey-rev0google,veyron-mickeygoogle,veyronrockchip,rk3288&7Google Mickeyaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12 ,@:Ar[ gcpu@501cpuarm,cortex-a12 ,@:Argcpu@502cpuarm,cortex-a12 ,@:Argcpu@503cpuarm,cortex-a12 ,@:Argopp-table-0operating-points-v2ogopp-126000000z opp-216000000z  opp-408000000zQ opp-600000000z#F opp-696000000z)|~opp-816000000z0,B@opp-1008000000z<opp-1200000000zGopp-1416000000zTfrOopp-1512000000zZJopp-1608000000z_" opp-1704000000zepopp-1800000000zkI\reserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mg timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H :a  pclktimerdisplay-subsystemrockchip,display-subsystem mmc@ff0c0000rockchip,rk3288-dw-mshcр :Drvbiuciuciu-driveciu-sample!  @,reset 8disabledmmc@ff0d0000rockchip,rk3288-dw-mshcр :Eswbiuciuciu-driveciu-sample! ! @,reset8okay?IZg} default mmc@ff0e0000rockchip,rk3288-dw-mshcр :Ftxbiuciuciu-driveciu-sample! "@,reset 8disabledmmc@ff0f0000rockchip,rk3288-dw-mshcр :Guybiuciuciu-driveciu-sample! #@,reset8okay?,7}default saradc@ff100000rockchip,saradc $F:I[saradcapb_pclkW ,saradc-apb 8disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi:ARspiclkapb_pclkX  ]txrx ,default 8disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi:BSspiclkapb_pclkX ]txrx -default 8disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi:CTspiclkapb_pclkX]txrx .default !"#8okayg flash@0jedec,spi-norzi2c@ff140000rockchip,rk3288-i2c >i2c:Mdefault$8okay2dtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c:Odefault% 8disabledi2c@ff160000rockchip,rk3288-i2c @i2c:Pdefault& 8disabled2,i2c@ff170000rockchip,rk3288-i2c Ai2c:Qdefault' 8disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7:MUbaudclkapb_pclkX]txrxdefault ()*8okaybluetoothdefault +,-brcm,bcm43540-bt . .  .-)serial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8:NVbaudclkapb_pclkX]txrxdefault/8okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9:OWbaudclkapb_pclkdefault08okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart ::PXbaudclkapb_pclkX]txrxdefault1 8disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;:QYbaudclkapb_pclkX  ]txrxdefault2 8disableddma-controller@ff250000arm,pl330arm,primecell%@@Kf: apb_pclkgthermal-zonesreserve-thermal}3cpu-thermal}d3tripscpu_crit_ criticalcpu_alert_almost_warmpassivecpu_alert_warmpassiveg4cpu_alert_almost_hot8passiveg6cpu_alert_hot@Ppassiveg7cpu_alert_hotterH passiveg8cpu_alert_very_hotLpassiveg9cooling-mapscpu_warm_limit_cpu40cpu_warm_limit_gpu4 5cpu_almost_hot_limit_cpu60cpu_hot_limit_cpu70cpu_hotter_limit_cpu80cpu_very_hot_limit_cpu90cpu_very_hot_limit_gpu9 5gpu-thermal}d3tripsgpu_crit_ criticalgpu_alert_warmish`passiveg:gpu_alert_warmpassiveg;gpu_alert_hotterH passiveg<gpu_alert_very_very_hotOpassiveg=cooling-mapsgpu_warmish_limit_gpu: 5gpu_warm_limit_cpu;0gpu_hotter_limit_gpu< 5gpu_very_very_hot_limit_gpu= 5tsadc@ff280000rockchip,rk3288-tsadc( %:HZtsadcapb_pclk ,tsadc-apbinitdefaultsleep>?>@H8okay*Ag3ethernet@ff290000rockchip,rk3288-gmac)\macirqeth_wake_irq@8:fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB ,stmmaceth 8disabledusb@ff500000 generic-ehciP :lAqusb 8disabled{usb@ff520000 generic-ohciR ):lAqusb 8disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T :otghostlB qusb2-phy 8disabledusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X :otghost@@ lC qusb2-phy8okayzCusb@ff5c0000 generic-ehci\ : 8disableddma-controller@ff600000arm,pl330arm,primecell`@@Kf: apb_pclk 8disabledi2c@ff650000rockchip,rk3288-i2ce <i2c:LdefaultD8okay2dpmic@1brockchip,rk808xin32kwifibt_32kin&Edefault FGH?MYeq}IJ JgregulatorsDCDC_REG1vdd_arm q qg regulator-state-mem3DCDC_REG2vdd_gpu 5qg{regulator-state-mem3DCDC_REG3 vcc135_ddrregulator-state-memLDCDC_REG4vcc_18w@w@gregulator-state-memLdw@LDO_REG3vdd_10B@B@regulator-state-memLdB@LDO_REG7 vdd10_lcdB@B@SWITCH_REG1 vcc33_lcdg^regulator-state-mem3LDO_REG8w@w@ vcc18_lcdi2c@ff660000rockchip,rk3288-i2cf =i2c:NdefaultK 8disabled2 pwm@ff680000rockchip,rk3288-pwmhdefaultL:_ 8disabledpwm@ff680010rockchip,rk3288-pwmhdefaultM:_8okaygpwm@ff680020rockchip,rk3288-pwmh defaultN:_ 8disabledpwm@ff680030rockchip,rk3288-pwmh0defaultO:_ 8disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsgpower-controller!rockchip,rk3288-power-controllerh gbpower-domain@9 :chgfdehilkj$PQRSTUVWXpower-domain@11 :opYZpower-domain@12 :[power-domain@13 :\]reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv: xin24m@Hjk$#gׄeрxhрxhgsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwg@edp-phyrockchip,rk3288-dp-phy:h24m$ 8disabledgrio-domains"rockchip,rk3288-io-voltage-domain8okay/I9DRIbIp^|usbphyrockchip,rk3288-usb-phy8okayusb-phy@320$ :]phyclk ,phy-resetgCusb-phy@334$4:^phyclk ,phy-resetgAusb-phy@348$H:_phyclk ,phy-resetgBwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt:p O8okaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif:T mclkhclkX_]tx 6default`@ 8disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5:Ri2s_clki2s_hclkX__]txrxdefaulta8okaygcrypto@ff8a0000rockchip,rk3288-crypto@ 0 :}aclkhclksclkapb_pclk ,crypto-rstiommu@ff900800rockchip,iommu@ : aclkiface 8disablediommu@ff914000rockchip,iommu @P : aclkiface 8disabledrga@ff920000rockchip,rk3288-rga :jaclkhclksclkb ilm ,coreaxiahbvop@ff930000rockchip,rk3288-vop  :aclk_vopdclk_vophclk_vopb def ,axiahbdclk c8okayportg endpoint@0 dgwendpoint@1 egsendpoint@2 fgmendpoint@3 ggpiommu@ff930300rockchip,iommu : aclkifaceb 8okaygcvop@ff940000rockchip,rk3288-vop  :aclk_vopdclk_vophclk_vopb  ,axiahbdclk h 8disabledportg endpoint@0 igxendpoint@1 jgtendpoint@2 kgnendpoint@3 lgqiommu@ff940300rockchip,iommu : aclkifaceb  8disabledghdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ :~d refpclkb @ 8disabledportsport@0endpoint@0 mgfendpoint@1 ngkport@1lvds@ff96c000rockchip,rk3288-lvds@:g pclk_lvdslcdcob @ 8disabledportsport@0endpoint@0 pggendpoint@1 qglport@1dp@ff970000rockchip,rk3288-dp@ b:icdppclklrqdpb o,dp@ 8disabledportsport@0endpoint@0 sgeendpoint@1 tgjport@1hdmi@ff980000rockchip,rk3288-dw-hdmi@ g:hmniahbisfrcecb 8okaydefaultunwedgeuvgportsportendpoint@0 wgdendpoint@1 xgivideo-codec@ff9a0000rockchip,rk3288-vpu   \vepuvdpu: aclkhclk yb iommu@ff9a0800rockchip,iommu : aclkifaceb gyiommu@ff9c0440rockchip,iommu @@@ o: aclkiface 8disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ \jobmmugpu: zb 8okay {g5opp-table-1operating-points-v2gzopp-100000000z~opp-200000000z ~opp-300000000zB@opp-400000000zׄopp-600000000z#Fqos@ffaa0000rockchip,rk3288-qossyscon g\qos@ffaa0080rockchip,rk3288-qossyscon g]qos@ffad0000rockchip,rk3288-qossyscon gQqos@ffad0100rockchip,rk3288-qossyscon gRqos@ffad0180rockchip,rk3288-qossyscon gSqos@ffad0400rockchip,rk3288-qossyscon gTqos@ffad0480rockchip,rk3288-qossyscon gUqos@ffad0500rockchip,rk3288-qossyscon gPqos@ffad0800rockchip,rk3288-qossyscon gVqos@ffad0880rockchip,rk3288-qossyscon gWqos@ffad0900rockchip,rk3288-qossyscon gXqos@ffae0000rockchip,rk3288-qossyscon g[qos@ffaf0000rockchip,rk3288-qossyscon gYqos@ffaf0080rockchip,rk3288-qossyscon gZdma-controller@ffb20000arm,pl330arm,primecell@@Kf: apb_pclkg_efuse@ffb40000rockchip,rk3288-efuse :q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400 ' <@ @ `   gpinctrlrockchip,rk3288-pinctrl@default |}~gpio@ff750000rockchip,gpio-banku Q:@ M ] ' <| iPMIC_SLEEP_APPMIC_INT_LPOWER_BUTTON_LRECOVERY_SW_LOT_RESETAP_WARM_RESET_HI2C0_SDA_PMICI2C0_SCL_PMICnFALUTgEgpio@ff780000rockchip,gpio-bankx R:A M ] ' <gpio@ff790000rockchip,gpio-banky S:B M ] ' <0 iCONFIG0CONFIG1CONFIG2CONFIG3EMMC_RST_Lggpio@ff7a0000rockchip,gpio-bankz T:C M ] ' < iFLASH0_D0FLASH0_D1FLASH0_D2FLASH0_D3FLASH0_D4FLASH0_D5FLASH0_D6FLASH0_D7FLASH0_CS2/EMMC_CMDFLASH0_DQS/EMMC_CLKOgpio@ff7b0000rockchip,gpio-bank{ U:D M ] ' < iUART0_RXDUART0_TXDUART0_CTS_LUART0_RTS_LSDIO0_D0SDIO0_D1SDIO0_D2SDIO0_D3SDIO0_CMDSDIO0_CLKBT_DEV_WAKEWIFI_ENABLE_HBT_ENABLE_LWIFI_HOST_WAKEBT_HOST_WAKEg.gpio@ff7c0000rockchip,gpio-bank| V:E M ] ' <gpio@ff7d0000rockchip,gpio-bank} W:F M ] ' <gpio@ff7e0000rockchip,gpio-bank~ X:G M ] ' < iPWM_LOGTPM_INT_HSDMMC_DET_LAP_FLASH_WP_LCPU_NMIDVSOKHDMI_WAKEPOWER_HDMI_ONDVS1DVS2HDMI_CECI2C5_SDA_HDMII2C5_SCL_HDMIUART2_RXDUART2_TXDgJgpio@ff7f0000rockchip,gpio-bank Y:H M ] ' <^ iRAM_ID0RAM_ID1RAM_ID2RAM_ID3I2C1_SDA_TPMI2C1_SCL_TPMSPI2_CLKSPI2_CS0SPI2_RXDSPI2_TXDhdmihdmi-cec-c0 yhdmi-cec-c7 yhdmi-ddc yguhdmi-ddc-unwedge ygvpower-hdmi-on y gpcfg-output-low gpcfg-pull-up gpcfg-pull-down gpcfg-pull-none gpcfg-pull-none-12ma  gsuspendglobal-pwroff yg~ddrio-pwroff yg}ddr0-retention yg|ddr1-retention yedpedp-hpd y i2c0i2c0-xfer ygDi2c1i2c1-xfer yg$i2c2i2c2-xfer y  gKi2c3i2c3-xfer yg%i2c4i2c4-xfer yg&i2c5i2c5-xfer yg'i2s0i2s0-bus` ygalcdclcdc-ctl@ ygosdmmcsdmmc-clk ysdmmc-cmd ysdmmc-cd ysdmmc-bus1 ysdmmc-bus4@ ysdio0sdio0-bus1 ysdio0-bus4@ ygsdio0-cmd ygsdio0-clk ygsdio0-cd ysdio0-wp ysdio0-pwr ysdio0-bkpwr ysdio0-int ywifienable-h ygbt-enable-l yg,bt-host-wake ybt-host-wake-l yg+bt-dev-wake-sleep ybt-dev-wake-awake ybt-dev-wake yg-sdio1sdio1-bus1 ysdio1-bus4@ ysdio1-cd ysdio1-wp ysdio1-bkpwr ysdio1-int ysdio1-cmd ysdio1-clk ysdio1-pwr y emmcemmc-clk ygemmc-cmd ygemmc-pwr y emmc-bus1 yemmc-bus4@ yemmc-bus8 ygemmc-reset y gspi0spi0-clk y gspi0-cs0 y gspi0-tx ygspi0-rx ygspi0-cs1 yspi1spi1-clk y gspi1-cs0 y gspi1-rx ygspi1-tx ygspi2spi2-cs1 yspi2-clk yg spi2-cs0 yg#spi2-rx yg"spi2-tx y g!uart0uart0-xfer yg(uart0-cts yg)uart0-rts yg*uart1uart1-xfer y g/uart1-cts y uart1-rts y uart2uart2-xfer yg0uart3uart3-xfer yg1uart3-cts y uart3-rts y uart4uart4-xfer yg2uart4-cts y uart4-rts y tsadcotp-pin y g>otp-out y g?pwm0pwm0-pin ygLpwm1pwm1-pin ygMpwm2pwm2-pin ygNpwm3pwm3-pin ygOgmacrgmii-pins y rmii-pins yspdifspdif-tx y g`pcfg-pull-none-drv-8ma  gpcfg-pull-up-drv-8ma  pcfg-output-high gbuttonspwr-key-l ygpmicpmic-int-l ygFdvs-1 y gGdvs-2 ygHrebootap-warm-reset-h y grecovery-switchrec-mode-l y tpmtpm-int-h ywrite-protectfw-wp-ap ychosen serial2:115200n8memorymemorypower-button gpio-keysdefaultkey-power Power E t d?gpio-restart gpio-restart E default emmc-pwrseqmmc-pwrseq-emmcdefault  gsdio-pwrseqmmc-pwrseq-simple: ext_clockdefault .g vcc-5vregulator-fixedvcc_5vLK@LK@ gvcc33-sysregulator-fixed vcc33_sys2Z2Zgvcc50-hdmiregulator-fixed vcc50_hdmi  % 8J defaultvdd-logicpwm-regulator vdd_logic = B M{ a~pvcc33_ioregulator-fixed vcc33_io gIsound!rockchip,rockchip-audio-max98090 tVEYRON-HDMI   #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthhost-wakeup-gpiosshutdown-gpiosdevice-wakeup-gpiosmax-speedbrcm,bt-pcm-int-params#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvddio-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsgpio-line-namesrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpiopwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,hdmi-codecrockchip,i2s-controller