8( Dcompulab,omap3-sbc-t3517compulab,omap3-cm-t3517ti,am3517ti,omap3 +!7CompuLab SBC-T3517 with CM-T3517chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@4809e000{/ocp@68000000/can@5c050000/dvi-connector/svideo-connectorcpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+.Lidefaultwuart3-pinsnpmmc1-pins0green-led-pinsdss-dpi-common-pinsdss-dpi-cm-t35x-pins0ads7846-pinsmcspi1-pins i2c1-pinsmcbsp2-pins  hsusb1-phy-reset-pinsHhsusb2-phy-reset-pinsJotg-drv-vbus-pinsmmc2-pins0(*,.02wl12xx-core-pinsFusb-hub-pinsTsmsc2-pinstfp410-pinsi2c3-pinssb-t35-audio-amp-pinsmmc1-aux-pinsDsb-t35-usb-hub-pinsscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+clock@68 ti,clkselhclock-mcbsp5-mux-fckti,composite-mux-clockmcbsp5_mux_fck clock-mcbsp3-mux-fckti,composite-mux-clockmcbsp3_mux_fck clock-mcbsp4-mux-fckti,composite-mux-clockmcbsp4_mux_fck mcbsp5_fckti,composite-clock clock@4 ti,clkselclock-mcbsp1-mux-fckti,composite-mux-clockmcbsp1_mux_fck clock-mcbsp2-mux-fckti,composite-mux-clockmcbsp2_mux_fck mcbsp1_fckti,composite-clock mcbsp2_fckti,composite-clockmcbsp3_fckti,composite-clockmcbsp4_fckti,composite-clockemac_ick@32cti,am35xx-gate-clock,zemac_fck@32cti,gate-clock, vpfe_ick@32cti,am35xx-gate-clock,{vpfe_fck@32cti,gate-clock, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock,|hsotgusb_fck_am35xx@32cti,gate-clock,}hecc_ck@32cti,am35xx-gate-clock,~clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+.Lwl12xx-wkup-pinsprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clock p+sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockBMdpll3_m2x2_ckfixed-factor-clock BM"dpll4_x2_ckfixed-factor-clock!BMcorex2_fckfixed-factor-clock"BM#wkup_l4_ickfixed-factor-clockBMXcorex2_d3_fckfixed-factor-clock#BMtcorex2_d5_fckfixed-factor-clock#BMuclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockHvirt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ck@d00ti,omap3-dpll-per-clock D 0!dpll4_m2_ck@d48ti,divider-clock! ? H+$dpll4_m2x2_mul_ckfixed-factor-clock$BM%dpll4_m2x2_ck@d00ti,gate-clock% W&omap_96m_alwon_fckfixed-factor-clock&BM2dpll3_ck@d00ti,omap3-dpll-core-clock @ 0clock@1140 ti,clksel@clock-dpll3-m3ti,divider-clock dpll3_m3_ck +,clock-dpll4-m6ti,divider-clock dpll4_m6_ck! ?+>clock-emu-src-mux ti,mux-clockemu_src_mux_ck'()lclock-pclk-fckti,divider-clock pclk_fck* +clock-pclkx2-fckti,divider-clock pclkx2_fck* +clock-atclk-fckti,divider-clock atclk_fck* +clock-traceclk-src-fck ti,mux-clocktraceclk_src_fck'()+clock-traceclk-fckti,divider-clock traceclk_fck+  +dpll3_m3x2_mul_ckfixed-factor-clock,BM-dpll3_m3x2_ck@d00ti,gate-clock-  W.emu_core_alwon_ckfixed-factor-clock.BM'sys_altclk fixed-clock5mcbsp_clks fixed-clockcore_ckfixed-factor-clock BM/dpll1_fck@940ti,divider-clock/  @+0dpll1_ck@904ti,omap3-dpll-clock0  $ @ 4dpll1_x2_ckfixed-factor-clockBM1dpll1_x2m2_ck@944ti,divider-clock1  D+Ecm_96m_fckfixed-factor-clock2BM3clock@d40 ti,clksel @clock-dpll3-m2ti,divider-clock dpll3_m2_ck + clock-omap-96m-fck ti,mux-clock omap_96m_fck3Pclock-omap-54m-fck ti,mux-clock omap_54m_fck45Aclock-omap-48m-fck ti,mux-clock omap_48m_fck659clock@e40 ti,clksel@clock-dpll4-m3ti,divider-clock dpll4_m3_ck! +7clock-dpll4-m4ti,divider-clock dpll4_m4_ck! +:dpll4_m3x2_mul_ckfixed-factor-clock7BM8dpll4_m3x2_ck@d00ti,gate-clock8 W4cm_96m_d2_fckfixed-factor-clock3BM6omap_12m_fckfixed-factor-clock9BMQdpll4_m4x2_mul_ckti,fixed-factor-clock:m{;dpll4_m4x2_ck@d00ti,gate-clock; WTdpll4_m5_ck@f40ti,divider-clock! ?@+<dpll4_m5x2_mul_ckti,fixed-factor-clock<m{=dpll4_m5x2_ck@d00ti,gate-clock= Wdpll4_m6x2_mul_ckfixed-factor-clock>BM?dpll4_m6x2_ck@d00ti,gate-clock? W@emu_per_alwon_ckfixed-factor-clock@BM(clock@d70 ti,clksel pclock-clkout2-src-gate ti,composite-no-wait-gate-clockclkout2_src_gate_ck/Cclock-clkout2-src-muxti,composite-mux-clockclkout2_src_mux_ck/3ADclock-sys-clkout2ti,divider-clock sys_clkout2B @clkout2_src_ckti,composite-clockCDBmpu_ckfixed-factor-clockEBMFarm_fck@924ti,divider-clockF $ emu_mpu_alwon_ckfixed-factor-clockFBM)clock@a40 ti,clksel @clock-l3-ickti,divider-clockl3_ick/ +Gclock-l4-ickti,divider-clockl4_ickG +Iclock-gpt10-mux-fckti,composite-mux-clockgpt10_mux_fckHMclock-gpt11-mux-fckti,composite-mux-clockgpt11_mux_fckHOclock@c40 ti,clksel @clock-rm-ickti,divider-clockrm_ickI +clock-gpt1-mux-fckti,composite-mux-clock gpt1_mux_fckHWclock@a00 ti,clksel clock-gpt10-gate-fckti,composite-gate-clockgpt10_gate_fck Lclock-gpt11-gate-fckti,composite-gate-clockgpt11_gate_fck Nclock-mmchs2-fckti,wait-gate-clock mmchs2_fckclock-mmchs1-fckti,wait-gate-clock mmchs1_fckclock-i2c3-fckti,wait-gate-clock i2c3_fckclock-i2c2-fckti,wait-gate-clock i2c2_fckclock-i2c1-fckti,wait-gate-clock i2c1_fckclock-mcbsp5-gate-fckti,composite-gate-clockmcbsp5_gate_fck  clock-mcbsp1-gate-fckti,composite-gate-clockmcbsp1_gate_fck  clock-mcspi4-fckti,wait-gate-clock mcspi4_fckJclock-mcspi3-fckti,wait-gate-clock mcspi3_fckJclock-mcspi2-fckti,wait-gate-clock mcspi2_fckJclock-mcspi1-fckti,wait-gate-clock mcspi1_fckJclock-uart2-fckti,wait-gate-clock uart2_fckJclock-uart1-fckti,wait-gate-clock uart1_fckJ clock-hdq-fckti,wait-gate-clockhdq_fckKclock-uart4-fck-am35xxti,wait-gate-clockuart4_fck_am35xxJclock-mmchs3-fckti,wait-gate-clock mmchs3_fckgpt10_fckti,composite-clockLMgpt11_fckti,composite-clockNOcore_96m_fckfixed-factor-clockPBMcore_48m_fckfixed-factor-clock9BMJcore_12m_fckfixed-factor-clockQBMKcore_l3_ickfixed-factor-clockGBMRclock@a10 ti,clksel clock-sdrc-ickti,wait-gate-clock sdrc_ickRyclock-mmchs2-ickti,omap3-interface-clock mmchs2_ickSclock-mmchs1-ickti,omap3-interface-clock mmchs1_ickSclock-hdq-ickti,omap3-interface-clockhdq_ickSclock-mcspi4-ickti,omap3-interface-clock mcspi4_ickSclock-mcspi3-ickti,omap3-interface-clock mcspi3_ickSclock-mcspi2-ickti,omap3-interface-clock mcspi2_ickSclock-mcspi1-ickti,omap3-interface-clock mcspi1_ickSclock-i2c3-ickti,omap3-interface-clock i2c3_ickSclock-i2c2-ickti,omap3-interface-clock i2c2_ickSclock-i2c1-ickti,omap3-interface-clock i2c1_ickSclock-uart2-ickti,omap3-interface-clock uart2_ickSclock-uart1-ickti,omap3-interface-clock uart1_ickS clock-gpt11-ickti,omap3-interface-clock gpt11_ickS clock-gpt10-ickti,omap3-interface-clock gpt10_ickS clock-mcbsp5-ickti,omap3-interface-clock mcbsp5_ickS clock-mcbsp1-ickti,omap3-interface-clock mcbsp1_ickS clock-omapctrl-ickti,omap3-interface-clock omapctrl_ickSclock-aes2-ickti,omap3-interface-clock aes2_ickSclock-sha12-ickti,omap3-interface-clock sha12_ickSclock-ipss-ickti,am35xx-interface-clock ipss_ickRclock-uart4-ick-am35xxti,omap3-interface-clockuart4_ick_am35xxSclock-mmchs3-ickti,omap3-interface-clock mmchs3_ickSgpmc_fckfixed-factor-clockRBMcore_l4_ickfixed-factor-clockIBMSclock@e00 ti,clkselclock-dss-tv-fckti,gate-clock dss_tv_fckAclock-dss-96m-fckti,gate-clock dss_96m_fckPclock-dss2-alwon-fckti,gate-clockdss2_alwon_fckclock-dss1-alwon-fck-3430es2ti,dss-gate-clockdss1_alwon_fck_3430es2Tdummy_ck fixed-clockclock@c00 ti,clksel clock-gpt1-gate-fckti,composite-gate-clockgpt1_gate_fckVclock-gpio1-dbckti,gate-clock gpio1_dbckUclock-wdt2-fckti,wait-gate-clock wdt2_fckUgpt1_fckti,composite-clockVWwkup_32k_fckfixed-factor-clockHBMUclock@c10 ti,clksel clock-wdt2-ickti,omap3-interface-clock wdt2_ickXclock-wdt1-ickti,omap3-interface-clock wdt1_ickXclock-gpio1-ickti,omap3-interface-clock gpio1_ickXclock-omap-32ksync-ickti,omap3-interface-clockomap_32ksync_ickXclock-gpt12-ickti,omap3-interface-clock gpt12_ickXclock-gpt1-ickti,omap3-interface-clock gpt1_ickXper_96m_fckfixed-factor-clock2BM per_48m_fckfixed-factor-clock9BMYclock@1000 ti,clkselclock-uart3-fckti,wait-gate-clock uart3_fckY clock-gpt2-gate-fckti,composite-gate-clockgpt2_gate_fck[clock-gpt3-gate-fckti,composite-gate-clockgpt3_gate_fck]clock-gpt4-gate-fckti,composite-gate-clockgpt4_gate_fck_clock-gpt5-gate-fckti,composite-gate-clockgpt5_gate_fckaclock-gpt6-gate-fckti,composite-gate-clockgpt6_gate_fckcclock-gpt7-gate-fckti,composite-gate-clockgpt7_gate_fckeclock-gpt8-gate-fckti,composite-gate-clockgpt8_gate_fck gclock-gpt9-gate-fckti,composite-gate-clockgpt9_gate_fck iclock-gpio6-dbckti,gate-clock gpio6_dbckZclock-gpio5-dbckti,gate-clock gpio5_dbckZclock-gpio4-dbckti,gate-clock gpio4_dbckZclock-gpio3-dbckti,gate-clock gpio3_dbckZclock-gpio2-dbckti,gate-clock gpio2_dbckZ clock-wdt3-fckti,wait-gate-clock wdt3_fckZ clock-mcbsp2-gate-fckti,composite-gate-clockmcbsp2_gate_fckclock-mcbsp3-gate-fckti,composite-gate-clockmcbsp3_gate_fckclock-mcbsp4-gate-fckti,composite-gate-clockmcbsp4_gate_fckclock@1040 ti,clksel@clock-gpt2-mux-fckti,composite-mux-clock gpt2_mux_fckH\clock-gpt3-mux-fckti,composite-mux-clock gpt3_mux_fckH^clock-gpt4-mux-fckti,composite-mux-clock gpt4_mux_fckH`clock-gpt5-mux-fckti,composite-mux-clock gpt5_mux_fckHbclock-gpt6-mux-fckti,composite-mux-clock gpt6_mux_fckHdclock-gpt7-mux-fckti,composite-mux-clock gpt7_mux_fckHfclock-gpt8-mux-fckti,composite-mux-clock gpt8_mux_fckHhclock-gpt9-mux-fckti,composite-mux-clock gpt9_mux_fckHjgpt2_fckti,composite-clock[\gpt3_fckti,composite-clock]^gpt4_fckti,composite-clock_`gpt5_fckti,composite-clockabgpt6_fckti,composite-clockcdgpt7_fckti,composite-clockefgpt8_fckti,composite-clockghgpt9_fckti,composite-clockijper_32k_alwon_fckfixed-factor-clockHBMZper_l4_ickfixed-factor-clockIBMkclock@1010 ti,clkselclock-gpio6-ickti,omap3-interface-clock gpio6_ickkclock-gpio5-ickti,omap3-interface-clock gpio5_ickkclock-gpio4-ickti,omap3-interface-clock gpio4_ickkclock-gpio3-ickti,omap3-interface-clock gpio3_ickkclock-gpio2-ickti,omap3-interface-clock gpio2_ickk clock-wdt3-ickti,omap3-interface-clock wdt3_ickk clock-uart3-ickti,omap3-interface-clock uart3_ickk clock-uart4-ickti,omap3-interface-clock uart4_ickkclock-gpt9-ickti,omap3-interface-clock gpt9_ickk clock-gpt8-ickti,omap3-interface-clock gpt8_ickk clock-gpt7-ickti,omap3-interface-clock gpt7_ickkclock-gpt6-ickti,omap3-interface-clock gpt6_ickkclock-gpt5-ickti,omap3-interface-clock gpt5_ickkclock-gpt4-ickti,omap3-interface-clock gpt4_ickkclock-gpt3-ickti,omap3-interface-clock gpt3_ickkclock-gpt2-ickti,omap3-interface-clock gpt2_ickkclock-mcbsp2-ickti,omap3-interface-clock mcbsp2_ickkclock-mcbsp3-ickti,omap3-interface-clock mcbsp3_ickkclock-mcbsp4-ickti,omap3-interface-clock mcbsp4_ickkemu_src_ckti,clkdm-gate-clockl*secure_32k_fck fixed-clockmgpt12_fckfixed-factor-clockmBMwdt1_fckfixed-factor-clockmBMrmii_ck fixed-clockpclk_ck fixed-clockdpll5_ck@d04ti,omap3-dpll-clock  $ L 4ndpll5_m2_ck@d50ti,divider-clockn  P+xsgx_gate_fck@b00ti,composite-gate-clock/ vcore_d3_ckfixed-factor-clock/BMocore_d4_ckfixed-factor-clock/BMpcore_d6_ckfixed-factor-clock/BMqomap_192m_alwon_fckfixed-factor-clock&BMrcore_d2_ckfixed-factor-clock/BMssgx_mux_fck@b40ti,composite-mux-clock opq3rstu @wsgx_fckti,composite-clockvwsgx_ick@b10ti,wait-gate-clockG cpefuse_fck@a08ti,gate-clock ts_fck@a08ti,gate-clockH usbtll_fck@a08ti,wait-gate-clockx clock@a18 ti,clksel clock-usbtll-ickti,omap3-interface-clock usbtll_ickSdss_ick_3430es2@e10ti,omap3-dss-interface-clockIusbhost_120m_fck@1400ti,gate-clockxusbhost_48m_fck@1400ti,dss-gate-clock9usbhost_ick@1410ti,omap3-dss-interface-clockIclockdomainscore_l3_clkdmti,clockdomainyz{|}~dpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomain*dpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomainnsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscUfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  Rick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdma   #`gpio@48310000ti,omap3-gpioH1gpio10BRgpio@49050000ti,omap3-gpioIgpio2BRgpio@49052000ti,omap3-gpioI gpio3BRgpio@49054000ti,omap3-gpioI@ gpio4BRgpio@49056000ti,omap3-gpioI`!gpio5BRgpio@49058000ti,omap3-gpioI"gpio6BRserial@4806a000ti,omap3-uartH ^Hr12wtxrxuart1lserial@4806c000ti,omap3-uartH^Ir34wtxrxuart2lserial@49020000ti,omap3-uartI^Jr56wtxrxuart3lidefaultwi2c@48070000 ti,omap3-i2cH8+i2c1idefaultwat24@50 atmel,24c02Pi2c@48072000 ti,omap3-i2cH 9+i2c2i2c@48060000 ti,omap3-i2cH=+i2c3idefaultwat24@50 atmel,24c02Pmailbox@48094000ti,omap3-mailboxmailboxH @ disabledmbox-dsp  spi@48098000ti,omap2-mcspiH A+mcspi1@r#$%&'()* wtx0rx0tx1rx1tx2rx2tx3rx3idefaultwads7846@0idefaultw ti,ads7846`  #,<L\ l|spi@4809a000ti,omap2-mcspiH B+mcspi2 r+,-.wtx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 rwtx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4rFGwtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1r=>wtxrxidefaultw  mmc@480b4000ti,omap3-hsmmcH @Vmmc2r/0wtxrxidefaultw+wlcore@2 ti,wl1271 Immc@480ad000ti,omap3-hsmmcH ^mmc3rMNwtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp disabledmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< +commontxrx;mcbsp1r wtxrxfck disabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H  disabledrng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?+commontxrxsidetone;mcbsp2mcbsp2_sidetoner!"wtxrxfckickokayidefaultwmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZ+commontxrxsidetone;mcbsp3mcbsp3_sidetonerwtxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 +commontxrx;mcbsp4rwtxrxfckJ disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR +commontxrx;mcbsp5rwtxrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1rEwrxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1[otimer@0ti,omap3430-timerfck%ztarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I [otimer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_zusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phy ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrwrxtx +BR -nand@0,0ti,omap2-nand  +:Lsw\jx|xxxZZH&<@xQxbtZ+partition@0xloaderpartition@80000ubootpartition@260000uboot environment&partition@2a0000linux*@partition@6a0000rootfsjethernet@4,0smsc,lan9221smsc,lan9115idefaultw  :\j|(--@QxK&Ktb'5Btarget-module@480ab000ti,sysc-omap2ti,syscH H H revsyscsyss  fck+ H  disabledusb@0ti,omap3-musb\]+mcdmaXck dss@48050000 ti,omap3-dssHokay dss_corefck+idefaultwdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH okay dss_vencfckportendpointtportendpointtssi-controller@48058000 ti,omap3-ssissi disabledHHsysgddG+gdd_mpu+ssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFtarget-module@5c040000ti,sysc-omap2ti,sysc\\\revsyscsyss  |fck+ \am35x_otg_hs@0ti,omap3-musbokayG+mcidefaultwethernet@5c000000ti,am3517-emac davinci_emacokay\CDEF   zickmdio@5c030000ti,davinci_mdio davinci_mdiookay\ .B@+fckserial@4809e000ti,omap3-uartuart4 disabledH Tr76wtxrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+.Lcan@5c050000ti,am3517-hecc disabled\\0\ hecchecc-rammbx~target-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpuopp-50-300000000 7 >O L ]opp-100-600000000 7#F >O Lmemory@80000000memoryleds gpio-ledsidefaultwledb cm-t3x:green  iheartbeathsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z phsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z phsusb1_phyusb-nop-xceiv idefaultw hsusb2-phy-pinsusb-nop-xceiv idefaultw ads7846-regregulator-fixed ads7846-reg2Z2Zsvideo-connectorsvideo-connectortvportendpointtregulator-vmmcregulator-fixedvmmc2Z2Zwl12xx_vmmc2regulator-fixedvw1271idefaultww@w@  N  wl12xx_vaux2regulator-fixedvwl1271_vaux2w@w@encoder ti,tfp410 idefaultwports+port@0endpointtport@1endpointtdvi-connectordvi-connectordviportendpointtaudio_ampregulator-fixed audio_ampidefaultw  regulator-vddvario-sb-t35regulator-fixed vddvario regulator-vdd33a-sb-t35regulator-fixedvdd33a  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3candisplay0display1device_typeregclocksclock-namesclock-latencyoperating-points-v2interruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendeddmasdma-namespagesize#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplywp-gpioscd-gpiosvqmmc-supplynon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,bus-turnaround-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsremote-endpointti,channelsdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqopp-hzopp-microvoltopp-supported-hwopp-suspendlinux,default-triggerstartup-delay-us#phy-cellsreset-gpiosenable-active-highpowerdown-gpiosregulator-always-on